The present invention relates to a receiver, particularly to a receiver for demodulating a signal to be PSK-modulated in which digital signals modulated by 2-, 4-, and 8-phase PSK modulation systems are time-multiplexed in accordance with a hierarchical transmission system or the like by using a carrier wave regenerated by carrier-wave regenerating means to output I and Q symbol-stream data.
Practical use of digital satellite TV broadcast is advanced which conforms to a plurality of modulation systems having necessary C/Ns different from each other such as hierarchical transmission systems in which a wave to be 8PSK-modulated, a wave to be QPSK-modulated, and a wave to be BPSK-modulated are time-multiplexed and repeatedly transmitted with frame.
FIG. 11(1) is an illustration showing a frame configuration of a hierarchical transmission system. One frame is configured by a frame-synchronizing-signal pattern comprising 32 BPSK-modulated symbols (20 latter-half symbols among 32 symbols are actually used as frame-synchronizing signal), a TMCC (Transmission and Multiplexing Configuration Control) pattern comprising 128 BPSK-modulated symbols to identify a multiple transmission configuration, a super-frame identifying signal pattern comprising 32 symbols (20 latter-half symbols among 32 symbols are actually used as super-frame identifying signal), a main signal of 203 8PSK(trellis-codec-8PSK)-modulated symbols, a burst symbol signal (BS) of four symbols in which a pseudo random noise (PN) signal is BPSK-modulated, a main signal of 202 8PSK(trellis-codec-8PSK)-modulated symbols, a burst symbol signal (BS) of four symbols in which a pseudo random noise (PN) signal is BPSK-modulated, . . . , a main signal of 203 QPSK-modulated symbols, a burst symbol signal (BS) of four symbols in which a pseudo random noise (PN) signal is BPSK-modulated, a main signal of 203 QPSK-modulated symbols, and a burst symbol signal (BS) of four BPSK-modulated symbols in order.
In case of a receiver for receiving a digital wave to be modulated (wave to be PSK-modulated) according to a hierarchical transmission system, an intermediate-frequency signal of received signals received by a receiving circuit is demodulated by a demodulating circuit and two-series I and Q base-band signals (hereafter, I and Q base-band signals are also referred to as I and Q symbol-stream data) showing instantaneous values of I-axis and Q-axis orthogonal to each other for each symbol are obtained. Absolute phase generation to be fitted to a transmission-signal phase angle is performed by an absolute-phase generating circuit by acquiring a frame-synchronizing signal from the demodulated I and Q base-band signals, obtaining the present received-signal-phase rotation angle from a signal point arrangement of the acquired frame-synchronizing signal, and inversely rotating the phase of the demodulated I and Q base-band signals on the basis of the obtained received-signal phase rotation angle.
As shown in FIG. 12, an absolute-phase generating circuit of a receiver for receiving a wave to be PSK-modulated according to a conventional hierarchical transmission system is configured by a frame-sync detecting/regenerating circuit 2 serving as frame-synchronizing-signal acquiring means provided for the output side of a demodulating circuit 1 to acquire a frame-synchronizing signal, a remapper 7 serving as inversely-phase-rotating means comprising a ROM, and a received-signal-phase-rotation-angle detecting circuit 8 serving as received-signal-phase-rotation-angle detecting means. Symbol 9 denotes a transmission-configuration identifying circuit for identifying the multiple transmission configuration shown in FIG. 11(1), which outputs a two-bit modulation-system identifying signal DM.
The demodulating circuit 1 orthogonally detects intermediate-frequency signals to obtain I and Q base-band signals. In the demodulating circuit 1, symbol 10 denotes a carrier-wave regenerating circuit to regenerate two reference carrier waves fc1 (=cosxcfx89t) and fc2 (=sinxcfx89t) orthogonal to each other with phases shifted from each other by 90xc2x0 because a frequency and a phase synchronize with a carrier wave before modulated in inputs of the demodulating circuit 1. Symbols 60 and 61 denote multipliers for multiplying an intermediate-frequency signal IF by fc1 and fc2, 62 and 63 denote A/D converters for A/D-converting outputs of the multipliers 60 and 61 at a sampling rate two times larger than a symbol rate, 64 and 65 denote digital filters for applying band restriction to outputs of the A/D converters 62 and 63 through digital-signal processing, 66 and 67 denote thinning circuits for thinning outputs of the digital filters 64 and 65 to 1/2 sampling rate and outputting two series of I and Q base-band signals (I and Q symbol-stream data) showing instantaneous values of I-axis and Q-axis for each symbol. The thinning circuits 66 and 67 transmit two series of I and Q base-band signals I(8) and Q(8) (a numeral in parentheses denotes the number of quantization bits which is hereafter also simply referred to as I and Q) respectively having 8 quantization bits (two""s complement system).
Mapping for each modulation system at the transmission side is described below by referring to FIGS. 13(1) to 13(3). FIG. 13(1) shows signal point arrangements on I-Q phase plane (also referred to as I-Q vector plane or I-Q signal space diagram) when using 8PSK for a modulation system. The 8PSK modulation system transmits a three-bit digital signal (abc) by one symbol. Combinations of bits constituting the symbol include such eight ways as (000), (001), (010), (011), (100), (101), (110), and (111). These three-bit digital signals are converted into signal point arrangements xe2x80x9c0xe2x80x9d to xe2x80x9c7xe2x80x9d on transmission-side I-Q phase plane in FIG. 12(1) and this conversion is referred to as 8PSK mapping.
In case of the example shown in FIG. 13(1), bit string (000) is converted into signal point arrangement xe2x80x9c0,xe2x80x9d bit string (001) into signal point arrangement xe2x80x9c1,xe2x80x9d bit string (011) into signal point arrangement xe2x80x9c2,xe2x80x9d bit string (010) into signal point arrangement xe2x80x9c3,xe2x80x9d bit string (100) into signal point arrangement xe2x80x9c4,xe2x80x9d bit string (101) into signal point arrangement xe2x80x9c5,xe2x80x9d bit string (111) into signal point arrangement xe2x80x9c6,xe2x80x9d and bit string (110) into signal point arrangement xe2x80x9c7.xe2x80x9d
FIG. 13(2) shows signal point arrangements on I-Q phase plane at the time of using QPSK for a modulation system. The QPSK modulation system transmits two-bit digital signal (de) by one symbol. Combinations of bits constituting the symbol include such four ways as (00), (01), (10), and (11). In the case of the example in FIG. 13(2), bit string (00) is converted into signal point arrangement xe2x80x9c1,xe2x80x9d bit string (01) into signal point arrangement xe2x80x9c3,xe2x80x9d bit string (11) into signal point arrangement xe2x80x9c5,xe2x80x9d and bit string (10) into signal point arrangement xe2x80x9c7.xe2x80x9d
FIG. 13(3) shows signal point arrangements at the time of using BPSK for a modulation system. The BPSK modulation system transmits one-bit digital signal (f) by one symbol. In case of the digital signal (f), bit (0) is converted into signal point arrangement xe2x80x9c0xe2x80x9d and bit (1) into signal point arrangement xe2x80x9c4.xe2x80x9d The relation between signal point arrangement and arrangement number is the same for various modulation systems on the basis of 8BPSK.
I-axis and Q-axis of QPSK and BPSK in a hierarchical transmission system coincide with I-axis and Q-axis of 8PSK.
When a phase of a carrier wave before modulated in inputs of the demodulating circuit 1 coincides with phases of reference carrier waves fc1 and fc2 regenerated by the carrier-wave regenerating circuit 10, a phase of a received-signal point on I-Q phase plane according to reception-side I and Q base-band signals I(8) and Q(8) when receiving digital signals related to signal point arrangements xe2x80x9c0xe2x80x9d to xe2x80x9c7xe2x80x9d on I-Q phase plane at the transmission side coincides with that of the transmission side. Therefore, by directly using the relation between signal point arrangement and digital signal at the transmission side (refer to FIG. 13), it is possible to correctly identify a digital signal received from a signal point arrangement of a received-signal point.
However, because the reference carrier waves fc1 and fc2 can actually take various phase states for a carrier wave before modulated in inputs of the demodulating circuit 1, a received-signal point at the reception side has a phase position rotated by a certain angle xcex8 against the transmission side. Moreover, when a phase of a carrier wave before modulated in inputs of the demodulating circuit 1 fluctuates, e also fluctuates. When a phase of a received-signal point rotates against the transmission side at random, it is impossible to identify a received digital signal. For example, when xcex8 is equal to xcfx80/8, a received-signal point of a digital signal (000) of a signal point arrangement xe2x80x9c0xe2x80x9d according to a transmission-side 8PSK modulation system is brought to the middle between signal point arrangements xe2x80x9c0xe2x80x9d and xe2x80x9c1xe2x80x9d at the reception side. Therefore, at the time of assuming that the digital signal (000) is received at the signal point arrangement xe2x80x9c0,xe2x80x9d it is judged that the signal is correctly received. However, at the time of assuming that the signal is received at the signal point arrangement xe2x80x9c1,xe2x80x9d it is erroneously judged that a digital signal (001) is received. Therefore, the carrier-wave regenerating circuit 10 corrects phases of the reference carrier waves fc1 and fc2 so that a received-signal point keeps a certain rotation angle against the transmission side and a digital signal is correctly identified.
Specifically, the reference carrier wave fc1 is generated by making a VCO (voltage control oscillator) 11 of the carrier-wave regenerating circuit 10 oscillate at a transmission-carrier-wave frequency and the reference carrier wave fc2 is generated by delaying a phase of an oscillation signal of the VCO 11 by 90xc2x0 by a 90xc2x0 phase shifter 12. Moreover, by changing a control voltage of the VCO 11, it is possible to change phases of the reference carrier waves fc1 and fc2.
The carrier-wave regenerating circuit 10 is provided with phase error tables 13, 14-1 and 14-2, and 15-1 to 15-4 obtained by tabulating relations between various data sets of I and Q base-band signals I(8) and Q(8) and carrier-wave-phase-error data (hereafter also referred to as phase error data) xcex94xcfx86(8) of eight quantization bits (two""s complement system) and respectively configured by a ROM for each of 8PSK, QPSK, and BPSK modulation systems (refer to FIG. 14). I and Q base-band signals I(8) and Q(8) are input to the phase error tables 13, 14-1 and 14-2, and 15-1 to 15-4 in parallel. A phase error table selectively enabled by a selector to be described later outputs phase error data xcex94xcfx86(8) corresponding to I and Q base-band signals I(8) and Q(8) input from the demodulating circuit 1.
The phase error table 13 is used for 8PSK, in which the relation between phase angle xcfx86 (refer to FIG. 15) and phase error data xcex94xcfx86(8) of a received-signal point shown by I and Q base-band signals I(8) and Q(8) in symbols input from the demodulating circuit 1 on I-Q phase plane is constituted as shown in FIG. 17. A selector 16 enables (activates) only the phase error table 13 while the demodulating circuit 1 demodulates digital waves to be modulated according to the BPSK modulation system (designated by a modulation-system identifying signal DM output from a transmission-configuration identifying circuit 9 to be described later) in accordance with a clock CLKSYB (refer to FIG. 11(2)) at a symbol rate synchronous with outputs of I and Q base-band signals I(8) and Q(8) output from the demodulating circuit 1 and reads phase error data xcex94xcfx86(8) corresponding to the set data of I and Q base-band signals I(8) and Q(8) whenever the demodulating circuit 1 outputs the I(8) and Q(8) for one symbol.
The phase error data xcex94xcfx86(8) is converted into a phase error voltage by a D/A converter 17 and then, low-frequency components of the data are removed by an LPF 18 and the data is applied to the VCO 11 as a control voltage. When the phase error data xcex94xcfx86(8) is equal to 0, outputs of the LPF 18 are not changed and therefore, phases of the reference carrier waves fc1 and fc2 are not changed. However, when the phase error data xcex94xcfx86(8) is positive, an output of the LPF 18 is strengthened and phases of the reference carrier waves fc1 and fc2 are delayed. However, when the phase error data xcex94xcfx86(8) is negative, an output of the LPF 18 is weakened and phases of the reference carrier waves fc1 and fc2 are advanced.
In the phase error table 13, when a modulation system is 8PSK, the difference between a phase angle xcfx86 of a received-signal point shown by I and Q base-band signals I(8) and Q(8) and a phase of the nearest one (which is a target phase convergent angle of the received-signal point) of signal point arrangements xe2x80x9c0xe2x80x9d to xe2x80x9c7xe2x80x9d is equal to phase error data xcex94xcfx86(8). In this connection, in FIG. 15, when the received-signal point is included in a certain area DRi among areas DR0 to DR7 obtained by dividing I-Q phase plane into eight sub-planes so that phases 0, xcfx80/4, 2xcfx80/4, 3xcfx80/4, 4xcfx80/4, 5xcfx80/4, 6xcfx80/4, and 7xcfx80/4 of signal point arrangements xe2x80x9c0xe2x80x9d to xe2x80x9c7xe2x80x9d respectively become a center, a target phase convergent angle of the received-signal point based on phase correction of the reference carrier waves fc1 and fc2 becomes equal to ixc2x7(xcfx80/4).
Therefore, digital signals of signal point arrangements of phases 0, xcfx80/4, 2xcfx80/4, 3xcfx80/4, 4xcfx80/4, 5xcfx80/4, 6xcfx80/4, and 7xcfx80/4 according to the 8PSK modulation system at the transmission side respectively converge into a position rotated by "THgr"=mxc3x97xcfx80/4 (m is any one of integers 0 to 7; refer to FIG. 16) on I-Q phase plane at the reception side. Symbol "THgr" denotes a phase rotation angle of a received-signal point against a transmission signal (also in the case of QPSK and BPSK, a received-signal-phase rotation angle is equal to "THgr" same as the case of 8PSK). Thereby, because a received-signal point according to the 8PSK modulation system is brought to any one of positions of phases 0, xcfx80/4, 2xcfx80/4, 3xcfx80/4, 4xcfx80/4, 5xcfx80/4, 6xcfx80/4, and 7xcfx80/4, signal point arrangements xe2x80x9c0xe2x80x9d to xe2x80x9c7xe2x80x9d on I-Q phase plane at the reception side have the same arrangements as the transmission side as a whole (however, the relation between individual signal point arrangement and digital signal depends on "THgr"). By detecting "THgr" and inversely rotating a phase by xe2x88x92"THgr", the relation between signal point arrangement and digital signal can be made same as that of the transmission side (absolute phase generation) and a received digital signal can be easily identified.
The phase error tables 14-1 and 14-2 are used for QPSK, in which the relation between phase angle xcfx86 and phase error data xcex94xcfx86(8) of a received signal point shown by I and Q base-band signals I(8) and Q(8) in symbols on I-Q phase plane is constituted as shown in FIGS. 18 and 19. Under normal reception, the selector 16 enables only the phase error table 14-1 when a received-signal-phase rotation angle "THgr" is equal to 0, 2xcfx80/4, 4xcfx80/4, or 6xcfx80/4 while the demodulating circuit 1 demodulates digital waves to be modulated according to the QPSK modulation system in accordance with a clock CLKSYB at a symbol rate and reads phase error data xcex94xcfx86(8) corresponding to the set data of I and Q base-band signals I(8) and Q(8) out of the phase error table 14-1 whenever the demodulating circuit 1 outputs the I(8) and Q(8) for one symbol.
The phase error table 14-1 is used when a modulation system uses QPSK and a received-signal-phase rotation angle "THgr" is equal to any one of 0, 2xcfx80/4, 4xcfx80/4, and 6xcfx80/4, in which the difference between a phase angle xcfx86 of a received-signal point shown by I and Q base-band signals I(8) and Q(8) and a phase of the nearest one (which is a target phase-convergent angle of the received-signal point) of signal point arrangements xe2x80x9c1,xe2x80x9d xe2x80x9c3,xe2x80x9d xe2x80x9c5,xe2x80x9d and xe2x80x9c7xe2x80x9d is equal to phase error data xcex94xcfx86. In this connection, as shown in FIG. 20(1), when the received-signal point is included in an area ERi among areas ER0 to ER3 obtained by dividing I-Q phase plane into four sub-planes so that phases xcfx80/4, 3xcfx80/4, 5xcfx80/4, and 7xcfx80/4 of signal points arrangements xe2x80x9c1,xe2x80x9d xe2x80x9c3,xe2x80x9d xe2x80x9c5,xe2x80x9d and xe2x80x9c7xe2x80x9d respectively become a center, the target phase convergent angle is equal to ixc2x7(2xcfx80/4)+xcfx80/4.
Therefore, digital signals of signal point arrangements xe2x80x9c1,xe2x80x9d xe2x80x9c3,xe2x80x9d xe2x80x9c5,xe2x80x9d and xe2x80x9c7xe2x80x9d of phases xcfx80/4, 3xcfx80/4, 5xcfx80/4, and 7xcfx80/4 according to the QPSK modulation system at the transmission side respectively converge into a position rotated by the above angle "THgr" on I-Q phase plane at the reception side. When "THgr" is equal to 0, 2xcfx80/4, 4xcfx80/4, or 6xcfx80/4, a received-signal point according to the QPSK modulation system is brought to any one of positions of phases xcfx80/4, 3xcfx80/4, 5xcfx80/4 and 7xcfx80/4. By detecting "THgr" and inversely rotating a phase by xe2x88x92"THgr", the relation between signal point arrangement and digital signal can be made the same as that of the transmission side (absolute phase generation) and a received digital signal can be easily identified.
Moreover, the selector 16 enables only the phase error table 14-2 when "THgr" is equal to xcfx80/4, 3xcfx80/4, 5xcfx80/4, or 7xcfx80/4 while the demodulating circuit 10 demodulates digital waves to be modulated according to the QPSK modulation system and reads phase error data xcex94xcfx86(8) corresponding to the set data of I and Q base-band signals I(8) and Q(8) out of the phase error table 14-2 whenever the demodulating circuit 1 outputs the I(8) and Q(8) for one symbol.
The phase error table 14-2 is used when a modulation system uses QPSK and a received-signal-phase rotation angle "THgr" is equal to any one of xcfx80/4, 3xcfx80/4, 5xcfx80/4, and 7xcfx80/4, in which the difference between a phase angle xcfx86 of a received-signal point shown by I and Q base-band signals I(8) and Q(8) and a phase of the nearest one (which is a target phase convergent angle of the received-signal point) of signal point arrangements xe2x80x9c0,xe2x80x9d xe2x80x9c2,xe2x80x9d xe2x80x9c4,xe2x80x9d and xe2x80x9c6xe2x80x9d is equal to phase error data xcex94xcfx86. In this connection, as shown in FIG. 20(2), when the received-signal point is included in an area FRi among areas FR0 to FR3 obtained by dividing I-Q phase plane into four sub-planes so that phases 0, 2xcfx80/4, 4xcfx80/4 and 6xcfx80/4 of signal point arrangements xe2x80x9c0,xe2x80x9d xe2x80x9c2,xe2x80x9d xe2x80x9c4,xe2x80x9d and xe2x80x9c6xe2x80x9d respectively become a center, the target phase convergent angle is equal to ixc2x7(2xcfx80/4).
Therefore, digital signals of signal point arrangements xe2x80x9c1,xe2x80x9d xe2x80x9c3,xe2x80x9d xe2x80x9c5,xe2x80x9d and xe2x80x9c7xe2x80x9d of phases xcfx80/4, 3xcfx80/4, 5xcfx80/4 and 7xcfx80/4 according to the QPSK modulation system at the transmission side respectively converge into a position rotated by the above angle "THgr" on I-Q phase plane at the reception side. When "THgr" is equal to xcfx80/4, 3xcfx80/4, 5xcfx80/4, or 7xcfx80/4, each received-signal point according to the QPSK modulation system is brought to any one of positions of phases 0, 2xcfx80/4, 4xcfx80/4, and 6xcfx80/4. By detecting "THgr" and inversely rotating a phase by xe2x88x92"THgr", the same phase as that of the transmission side is realized (absolute phase generation), the relation between signal point arrangement and digital signal can be made the same as that of the transmission side, and a received digital signal can be easily identified.
The phase error tables 15-1 to 15-4 are used for BPSK, in which the relation between phase angle xcfx86 and phase error data xcex94xcfx86(8) of a received-signal point shown by I and Q base-band signals I(8) and Q(8) on I-Q phase plane is constituted as shown in FIGS. 21 to 24. The selector 16 enables only the phase error table 15-1 when a received-signal-phase rotation angle "THgr" due to phase correction of an 8PSK modulation portion is equal to 0 or 4xcfx80/4 while the demodulating circuit 1 demodulates digital waves to be modulated according to the BPSK modulation system synchronously with a clock CLKSYB at a symbol rate and reads phase error data xcex94xcfx86(8) corresponding to the set data of I and Q base-band signals I(8) and Q(8) out of the phase error table 15-1 whenever the demodulating circuit 1 outputs the I(8) and Q(8) for one symbol.
The phase error table 15-1 is used when a modulation system uses BPSK and a received-signal-phase rotation angle "THgr" is equal to either of 0 and 4xcfx80/4, in which the difference between a phase angle xcfx86 of a received-signal point shown by I and Q base-band signals I(8) and Q(8) and a phase of the nearest one (which is a target phase convergent angle of the received-signal point) of signal point arrangements xe2x80x9c0xe2x80x9d and xe2x80x9c4xe2x80x9d is equal to phase error data xcex94xcfx86. In this connection, as shown in FIG. 25(1), when the received-signal point is included in the area GRi of areas GR0 and GR1 obtained by dividing I-Q phase plane into two sub-planes so that phases 0 and 4xcfx80/4 of signal point arrangements xe2x80x9c0xe2x80x9d and xe2x80x9c4xe2x80x9d respectively become a center, the target phase convergent angle is equal to ixc2x7(4xcfx80/4).
Therefore, digital signals of signal point arrangements xe2x80x9c0xe2x80x9d and xe2x80x9c4xe2x80x9d of phases 0 and 4xcfx80/4 according to the BPSK modulation system at the transmission side respectively converge into a position rotated by the above angle "THgr" on reception-side I-Q phase plane. When "THgr" is equal to 0 or 4xcfx80/4, a received-signal point according to the BPSK modulation system is brought to either of positions of phases 0 and 4xcfx80/4.
Moreover, the selector 16 enables only the phase error table 15-2 when "THgr" is equal to xcfx80/4 or 5xcfx80/4 while demodulating a digital wave to be modulated according to the BPSK modulation system and reads phase error data xcex94xcfx86(8) corresponding to I and Q base-band signals I(8) and Q(8) out of the phase error table 15-2 whenever the demodulating circuit 1 outputs the I(8) and Q(8) for one symbol.
The phase error table 15-2 is used when a modulation system uses BPSK and a received-signal-phase rotation angle "THgr" is equal to either of xcfx80/4 and 5xcfx80/4, in which the difference between a phase angle xcfx86 of a received-signal point shown by I and Q base-band signals I(8) and Q(8) and a phase of the nearest one (which is a target phase convergent angle of the received-signal point) of signal point arrangements xe2x80x9c1xe2x80x9d and xe2x80x9c5xe2x80x9d is equal to phase error data xcex94xcfx86. In this connection, as shown in FIG. 25(2), when the received-signal point is included in the area HR1 of areas HR0 and HR1 obtained by dividing I-Q phase plane into two sub-planes so that phases xcfx80/4 and 7xcfx80/4 of signal point arrangements xe2x80x9c1xe2x80x9d and xe2x80x9c5xe2x80x9d respectively become a center, the target phase convergent angle is equal to ixc2x7(4xcfx80/4)+xcfx80/4.
Thus, digital signals of signal point arrangements xe2x80x9c0xe2x80x9d and xe2x80x9c4xe2x80x9d of phases 0 and 4xcfx80/4 according to the BPSK modulation system at the transmission side respectively converge into a position rotated by the above angle "THgr" on I-Q phase plane at the reception side. When "THgr" is equal to xcfx80/4 or 5xcfx80/4, a received-signal point according to the BPSK modulation system is brought to either of positions of phases xcfx80/4 and 5xcfx80/4.
Moreover, the selector 16 enables only the phase error table 15-3 when "THgr" is equal to 2xcfx80/4 or 6xcfx80/4 while demodulating a digital wave to be modulated according to the BPSK modulation system and reads phase error data xcex94xcfx86(8) corresponding to the set data of I and Q base-band signals I(8) and Q(8) out of the phase error table 15-3 whenever the demodulating circuit 1 outputs the I(8) and Q(8) for one symbol.
The phase error table 15-3 is used when a modulation system uses BPSK and a received-signal-phase rotation angle "THgr" is equal to either of 2xcfx80/4 and 6xcfx80/4, in which the difference between a phase angle xcfx86 of a received-signal point shown by I and Q base-band signals I(8) and Q(8) and a phase of the nearest one (which is a target phase convergent angle of the received-signal point) of signal point arrangements xe2x80x9c2xe2x80x9d and xe2x80x9c6xe2x80x9d is equal to phase error data xcex94xcfx86. In this connection, as shown in FIG. 25(3), when the received-signal point is included in the area IRi of areas IR0 and IR1 obtained by dividing I-Q phase plane into two sub-planes so that phases 2xcfx80/4 and 6xcfx80/4 of signal point arrangements xe2x80x9c2xe2x80x9d and xe2x80x9c6xe2x80x9d respectively become a center, the target phase convergent angle is equal to ixc2x7(4xcfx80/4)+2xcfx80/4.
Therefore, digital signals of signal point arrangements xe2x80x9c0xe2x80x9d and xe2x80x9c4xe2x80x9d of phases 0 and 4xcfx80/4 according to the BPSK modulation system at the transmission side respectively converge into a position rotated by the above angle "THgr" on reception-side I-Q phase plane. When "THgr" is equal to 2xcfx80/4 or 6xcfx80/4, a received-signal point according to the BPSK modulation system is brought to either of positions of phases 2xcfx80/4 and 6xcfx80/4.
Moreover, the selector 16 enables only the phase error table 15-4 when "THgr" is equal to 3xcfx80/4 or 7xcfx80/4 while demodulating a digital wave to be modulated according to the BPSK modulation system and reads phase error data xcex94xcfx86(8) corresponding to the set data of I and Q base-band signals I(8) and Q(8) out of the phase error table 15-4 whenever the demodulating circuit 1 outputs the I(8) and Q(8) for one symbol.
The phase error table 15-4 is used when a modulation system uses BPSK and a received-signal-phase rotation angle "THgr" is equal to either of 3xcfx80/4 and 7xcfx80/4, in which the difference between a phase angle xcfx86 of a received-signal point shown by I and Q base-band signals I(8) and Q(8) and a phase of the nearest one (which is a target phase convergent angle of the received-signal point) of signal point arrangements xe2x80x9c3xe2x80x9d and xe2x80x9c7xe2x80x9d is equal to phase error data xcex94xcfx86. In this connection, as shown in FIG. 25(4), when the received-signal point is included in an area JRi of areas JR0 and JR1 obtained by dividing I-Q phase plane into two sub-planes so that phases 3xcfx80/4 and 7xcfx80/4 of signal point arrangements xe2x80x9c3xe2x80x9d and xe2x80x9c7xe2x80x9d respectively become a center, the target phase convergent angle is equal to ixc2x7(4xcfx80/4)+3xcfx80/4.
Thus, digital signals of signal point arrangements xe2x80x9c0xe2x80x9d and xe2x80x9c4xe2x80x9d of phases 0 and 4xcfx80/4 according to the BPSK modulation system at the transmission side respectively converge into a position rotated by the above angle "THgr" on reception-side I-Q phase plane. When "THgr" is equal to 3xcfx80/4 or 7xcfx80/4, the received-signal point according to the BPSK modulation system is brought to either of positions of phases 3xcfx80/4 and 7xcfx80/4. Also in the case of BPSK modulation, by detecting "THgr" and inversely rotating a phase by xe2x88x92"THgr", a phase same as that of the transmission side can be realized (absolute phase generation), the relation between a signal point arrangement and a digital signal can be made the same as that of the transmission side, and a received digital signal can be easily identified.
Moreover, as shown in FIG. 26, a frame-sync detecting/regenerating circuit 2 is configured by a BPSK demapper section 3, sync detecting circuits 40 to 47, a frame-synchronizing circuit 5, an OR gate circuit 53, and a frame-synchronizing-signal generator 6. As shown in FIG. 12, a received-signal-phase-rotation-angle detecting circuit 8 is configured by delay circuits 81 and 82, a 0xc2x0/180xc2x0 phase rotating circuit 83, averaging circuits 84 and 85, and a received-phase judging circuit 86.
I and Q base-band signals I(8) and Q(8) output from the demodulating circuit 1 are input to the BPSK demapper section 3 of the frame-sync detecting/regenerating circuit 2 in order to acquire, for example, a BPSK-modulated frame-synchronizing signal and a BPSK-demapped bit stream B0 is output. The BPSK demapper section 3 is configured by, for example, a ROM.
Then, a frame-synchronizing signal will be described. In case of the hierarchical transmission system, a frame-synchronizing signal is transmitted by being BPSK-modulated so that a necessary C/N is minimized. A frame-synchronizing signal configured by 20 bits has a bit stream of (S0S1 . . . S18S19)=(11101100110100101000) which are transmitted in order starting with S0. Hereafter, a bit stream of a frame-synchronizing signal is also referred to as xe2x80x9cSYNCPAT.xe2x80x9d The bit stream is converted into a signal point arrangement xe2x80x9c0xe2x80x9d or xe2x80x9c4xe2x80x9d through the BPSK mapping shown in FIG. 13(3) at the transmission side and a converted symbol stream is transmitted.
To acquire a frame-synchronizing signal of 20 bits to be BPSK-modulated and transmitted, that is, 20 symbols, it is necessary to convert received symbols into bits through the BPSK demapping shown in FIG. 27(1) inversely to the mapping to be converted at the transmission side. Therefore, as shown in FIG. 27(1), (0) is judged when a demodulated signal is received in a hatched area on reception-side I-Q phase plane and (1) is judged when the signal is received in a not-hatched area. That is, in FIG. 27(1), an output is classified into (0) or (1) depending on a judgement area in which the output is received out of two judgement areas divided by a BPSK judgement border line shown by a bold line in FIG. 27(1) and thereby, it is assumed that BPSK demapping is performed.
I and Q base-band signals I(8) and Q(8) are input to the BPSK demapper section 3 for performing BPSK demapping and the bit stream B0 BPSK-demapped in the BPSK demapper section 3 is output. In this specification, a demapper denotes a circuit for performing demapping. The bit stream B0 is input to the sync detecting circuit 40 in which a bit stream of a frame-synchronizing signal is acquired from the bit stream B0.
Then, the sync detecting circuit 40 is described by referring to FIG. 28. The sync detecting circuit 40 has 20 D-flip-flops (hereafter referred to as D-F/Fs) D19 to D0 connected in series and a 20-stage shift register is constituted by these D-F/Fs D19 to D0. The bit stream B0 is input to the D-F/F D19 and successively shifted up to the D-F/F D0. At the same time, predetermined logical inversion is applied to predetermined bits of outputs of the D-F/Fs D19 to D0 and then, the outputs are input to an AND gate 51. When output states (D0D1 . . . D18D19) of the D-F/Fs D19 to D0 become (11101100110100101000), an output SYNA0 of the AND gate 51 becomes a high potential. That is, when SYNCPAT is acquired, the SYNA0 becomes a high potential.
The output SYNA0 of the sync detecting circuit 40 is input to a frame-synchronizing circuit 5 through an OR gate circuit 53. In the frame-synchronizing circuit 5, when it is confirmed that an output SYNA of the OR gate circuit 53 repeatedly becomes a high potential every certain frame cycle, it is discriminated that a frame sync is established and a frame-synchronizing pulse is output every frame cycle.
In the case of a hierarchical transmission system to which a plurality of modulation systems having necessary C/Ns different from each other are time-multiplexed and repeatedly transmitted with frame, header data showing their multiple configuration is multiplexed (TMCC pattern in FIG. 11(1)). The transmission-configuration identifying circuit 9 extracts TMCC showing a multiple configuration from a bit stream after a BPSK demapper input from the frame-synchronizing circuit 5 after it is discriminated that frame sync is established in the frame-sync detecting/regenerating circuit 2, decodes the TMCC, and outputs a modulation-system identifying signal DM showing to which modulation system the present I and Q base-band signals I and Q conform to the selector 16 and the like (refer to FIG. 11(2)).
Moreover, the received-signal-phase-rotation-angle detecting circuit 8 detects a received-signal-phase rotation angle "THgr" in accordance with a regenerated frame-synchronizing signal output from the frame-synchronizing-signal generator 6 after it is discriminated that frame sync is established in the frame-sync detecting/regenerating circuit 2 and outputs a three-bit received-signal-phase-rotation-angle signal AR(3) to the remapper 7 and the selector 16 of the carrier-wave regenerating circuit 10.
After a modulation-system identifying signal DM is input from the transmission-configuration identifying circuit 9 and a received-signal-phase-rotation-angle signal AR(3) is input from the received-signal-phase-rotation-angle detecting circuit 8, the selector 16 of the carrier-wave regenerating circuit 10 reads phase error data xcex94xcfx86(8) out of a phase error table corresponding to a modulation system and a received-signal-phase rotation angle "THgr" and outputs the data xcex94xcfx86(8) to the D/A converter 17. However, before outputting the data, the selector 16 reads phase error data xcex94xcfx86(8) out of the phase error table 13 for 8PSK.
Therefore, the demodulating circuit 1 always operates as an 8PSK demodulating circuit before the transmission-configuration identifying circuit 9 identifies a multiple configuration and the received-signal-phase-rotation-angle detecting circuit 8 detects a received-signal-phase rotation angle "THgr". Thus, a phase of a received-signal point rotates against the transmission side by "THgr"=mxc3x97xcfx80/4 (m is one of integers 0 to 7) depending on phase states of the reference carrier waves fc1 and fc2 regenerated by the carrier-wave regenerating circuit 10 of the demodulating circuit 1.
That is, as shown in FIG. 13(3), a demodulated frame-synchronizing signal has the following eight phase states depending on a phase state of the reference carrier wave fc1 or fc2: a case in which a received-signal point of a symbol stream of a frame-synchronizing signal BPSK-mapped to signal point arrangement xe2x80x9c0xe2x80x9d for bit (0) or to signal point arrangement xe2x80x9c4xe2x80x9d for bit (1) at the transmission side appears on signal point arrangement xe2x80x9c0xe2x80x9d or xe2x80x9c4xe2x80x9d similarly to the case of the transmission side, a case in which the received-signal point appears on signal point arrangement xe2x80x9c1xe2x80x9d or xe2x80x9c5xe2x80x9d phase-rotated by "THgr"=xcfx80/4, a case in which the received-signal point appears on signal point arrangement xe2x80x9c2xe2x80x9d or xe2x80x9c6xe2x80x9d phase-rotated by "THgr"=2xcfx80/4, a case in which the received-signal point appears on signal point arrangement xe2x80x9c3xe2x80x9d or xe2x80x9c7xe2x80x9d phase-rotated by "THgr"=3xcfx80/4, a case in which the received-signal point appears on signal point arrangement xe2x80x9c4xe2x80x9d or xe2x80x9c0xe2x80x9d phase-rotated by "THgr"=4xcfx80/4, a case in which the received-signal point appears on signal point arrangement xe2x80x9c5xe2x80x9d or xe2x80x9c1xe2x80x9d phase-rotated by "THgr"=5xcfx80/4, a case in which the received-signal point appears on signal point arrangement xe2x80x9c6xe2x80x9d or xe2x80x9c2xe2x80x9d phase-rotated by "THgr"=6xcfx80/4, and a case in which the received-signal point appears on signal point arrangement xe2x80x9c7xe2x80x9d or xe2x80x9c3xe2x80x9d phase-rotated by "THgr"=7xcfx80/4. Therefore, it must be possible to acquire a frame-synchronizing signal demodulated in any phase.
Therefore, as shown in FIG. 29, the BPSK demapper section 3 is configured by BPSK demappers 30 to 37 corresponding to phase rotations of "THgr"=0 (m=0), "THgr"=xcfx80/4 (m=1), "THgr"=2xcfx80/4 (m=2), . . . , "THgr"=6xcfx80/4 (m=6), and "THgr"=7xcfx80/4 (m=7).
FIG. 27(2) shows BPSK demapping for a case in which a phase of a symbol stream of a demodulated frame-synchronizing signal rotates by "THgr"=xcfx80/4, and bit (0) appears on signal point arrangement xe2x80x9c1xe2x80x9d and bit (1) appears on signal point arrangement xe2x80x9c5.xe2x80x9d A BPSK judgement border line shown by a bold line in FIG. 27(2) rotates by xcfx80/4 counterclockwise from the BPSK judgement border line shown by a bold line for BPSK demapping in FIG. 27(1) in the case of reception at the same phase as the transmission side. By using a BPSK demapper (refer to symbol 31 in FIG. 29) for performing the BPSK demapping shown in FIG. 27(2), it is possible to stably acquire a frame-synchronizing signal phase-rotated by "THgr"=xcfx80/4. A bit stream BPSK-demapped by the BPSK demapper 31 serves as an output B1 of the BPSK demapper section 3 in FIG. 26.
Similarly, BPSK demappers 32 to 37 perform BPSK demapping at BPSK judgement border lines rotated by 2xcfx80/4, 3xcfx80/4, . . . , and 7xcfx80/4 counterclockwise from the BPSK judgement border line shown by a bold line for the BPSK demapping in FIG. 27(1) to stably acquire frame-synchronizing signals phase-rotated by "THgr"=2xcfx80/4, 3xcfx80/4, . . . , and 7xcfx80/4. Bit streams BPSK-demapped by the BPSK demappers 32 to 37 serve as outputs B2 to B7 of the BPSK demapper section 3 in FIG. 26. The BPSK demapper 30 performs BPSK demapping at the BPSK judgement border line shown by a bold line for the BPSK demapping in FIG. 27(1) to stably acquire a frame-synchronizing signal of "THgr"=0. A bit stream BPSK-demapped by the BPSK demapper 30 serves as an output B0 of the BPSK demapper section 3 in FIG. 26.
Configurations of sync detecting circuits 41 to 47 are the same as the configuration of the sync detecting circuit 40. By using these sync detecting circuits 40 to 47, a frame-synchronizing signal is acquired by one of the sync detecting circuits 40 to 47 independently of phase rotation of a base-band signal according to a phase state of the reference carrier wave fc1 or fc2 regenerated by the carrier-wave regenerating circuit 10 of the demodulating circuit 1 and a high-potential SYNAn (n is one of integers 0 to 7) is transmitted from the sync detecting circuit acquiring the frame-synchronizing signal.
The SYNAn output from one of the sync detecting circuits 40 to 47 is input to the OR gate circuit 53 and a logical sum SYNA of the SYNAn is output from the OR gate circuit 53. The frame-synchronizing circuit 5 judges that frame sync is established when it is confirmed that a high potential of SYNA is alternately repeatedly input every certain frame interval and outputs a frame-synchronizing pulse FSYNC every frame cycle. The frame-synchronizing-signal generator 6 generates a bit stream same as a pattern SYNCPAT of a frame-synchronizing signal acquired by the BPSK demapper 3, sync detecting circuits 40 to 47, and frame-synchronizing circuit 5 (the bit stream is referred to as a regenerated frame-synchronizing signal) in accordance with the frame-synchronizing pulse FSYNC output by the frame-synchronizing circuit 5.
The process is described above in which a frame-synchronizing signal is acquired from I and Q symbol-stream data I(8) and Q(8) output from the demodulating circuit 1 by the frame-sync detecting/regenerating circuit 2 shown in FIG. 26 and a regenerated frame-synchronizing signal is output from the frame-synchronizing-signal generator 6 after a certain time elapses.
Then, the transmission-configuration identifying operation by the transmission-configuration identifying circuit 9 is described below. The transmission-configuration identifying circuit 9 inputs bit streams B0 to B7 output by the BPSK demapper 3 of the frame-sync detecting/regenerating circuit 2, SYNA0 to SYNA7 output by sync detecting circuits 40 to 47, and a frame-synchronizing pulse FSYNC output by the frame-synchronizing circuit 5. Moreover, when the circuit 9 inputs the frame-synchronizing pulse FSYNC, it captures a bit stream Bn of a system repeatedly becoming a high potential in SYNA0 to SYNA7, extracts and decodes the TMCC pattern in FIG. 11(1) by using a predetermined timing signal generated in accordance with the frame-synchronizing pulse FSYNC, and outputs a modulation-system identifying signal DM showing on which modulation system the present I and Q base-band signals I and Q depend (refer to FIG. 11(2)).
Then, absolute phase generation is described below which is realized by obtaining the present received-signal-phase rotation angle from a signal point arrangement of an acquired frame-synchronizing signal and inversely rotating the phase of demodulated I and Q base-band signals I(8) and Q(8) in accordance with the obtained received-signal-phase rotation angle.
Each symbol of a symbol stream of a frame-synchronizing signal which is BPSK-mapped at the transmission side, transmitted, and demodulated to I and Q base-band signals I(8) and Q(8) by the demodulating circuit 1 is demapped to bit (0) or (1) by the BPSK demapper section 3 and the difference between phases of a symbol demapped to bit (0) and a symbol demapped to bit (1) is equal to 180xc2x0.
Therefore, by rotating the phase of the symbol demapped to bit (1) at the frame-synchronizing-signal portion of a received symbol stream by 180xc2x0, symbol streams which are all demapped to bit (0) are obtained.
Moreover, by obtaining the average value of a plurality of symbols of the symbol streams which are all demapped to bit (0), a received-signal-point arrangement for bit (0) of BPSK is obtained. Therefore, by obtaining the phase difference between the obtained received-signal point for bit (0) of BPSK and the signal point arrangement xe2x80x9c0xe2x80x9d mapped to bit (0) at the transmission side, assuming the phase difference as a received-signal-phase rotation angle "THgr", and applying phase rotation of xcex7=xe2x88x92"THgr" to the whole demodulated I and Q base-band signals, it is possible to generate absolute phases of I and Q base-band signals I(8) and Q(8).
As described above, by receiving a frame-synchronizing pulse output from the frame-synchronizing circuit 5, the frame-synchronizing-signal generator 6 generates a bit stream same as the pattern SYNCPAT of an acquired frame-synchronizing signal and supplies the bit stream to the 0xc2x0/180xc2x0 phase-rotating circuit 83 of the received-signal-phase-rotation-angle detecting circuit 8 as a regenerated frame-synchronizing signal. The 0xc2x0/180xc2x0 phase-rotating circuit 83 rotates the phase of I and Q base-band signals by 180xc2x0 for bit (1) of a bit stream of a supplied regenerated frame-synchronizing signal but the circuit 83 does not rotate the phase of I and Q base-band signals for bit (0) of the bit stream in accordance with a bit (0) or (1) of a bit stream of a supplied regenerated frame-synchronizing signal.
The timing of a bit stream of a regenerated frame-synchronizing signal transmitted from the frame-synchronizing-signal generator 6 is made to coincide with the timing of a symbol stream of a frame-synchronizing signal in I and Q symbol streams by the delay circuits 81 and 82 at the input side of the 0xc2x0/180xc2x0 phase-rotating circuit 83. The delay circuits 81 and 82 respectively open their output gate only while a frame-synchronizing-signal-interval signal is output from the frame-synchronizing-signal generator 6. Therefore, I and Q symbol streams DI(8) and DQ(8) of a frame-synchronizing-signal portion are output from the delay circuits 81 and 82. In case of the I and Q symbol streams DI(8) and DQ(8), a symbol portion corresponding to bit (1) of a bit stream of a regenerated frame-synchronizing signal is phase-rotated by 180xc2x0 by the 0xc2x0/180xc2x0 phase-rotating circuit 83 but a symbol portion corresponding to bit (0) is transmitted to the averaging circuits 84 and 85 as symbol streams VI(8) and VQ(8) without being phase-rotated. Because all of 20 bits of the symbol streams VI(8) and VQ(8) constituting a frame-synchronizing signal are equal to bit (0), the symbol streams VI(8) and VQ(8) serve as symbol streams when receiving a signal BPSK-mapped at the transmission side.
FIG. 30(1) shows the signal point arrangement of I and Q symbol streams I(8) and Q(8) of a frame-synchronizing signal when received at a received-signal-phase rotation angle "THgr"=0 and FIG. 30(2) shows the signal point arrangement of I and Q symbol streams VI(8) and VQ(8) after converted by the 0xc2x0/180xc2x0 phase-rotating circuit 83. I and Q symbol streams VI(8) and VQ(8) are transmitted to the averaging circuits 84 and 85 and their quantization bit lengths are respectively converted into 16 to 18 bits and then, quantization bit lengths for four frames(for 16xc3x974=64 symbols) are averaged, and the averaged value is output as AVI(8) and AVQ(8) according to the original quantization bit length of 8 bits. In this case, I and Q symbol streams VI(8) and VQ(8) are averaged in order to stably obtain a signal point arrangement even if a slight phase change or amplitude fluctuation occurs in a received base-band signal due to deterioration of a received C/N occurs.
A received-signal point [AVI(8), AVQ(8)] of a signal obtained by BPSK-mapping bit (0) by the averaging circuits 84 and 85 is obtained. Then, the received-signal point [AVI(8), AVQ(8)] is input to the received-phase judging circuit 86 comprising a ROM and a received-signal-phase rotation angle "THgr" is obtained in accordance with a received-signal-phase-rotation-angle judging table on the AVI-AVQ phase plane shown in FIG. 31 and a phase-rotation-angle signal AR(3) of three bits (natural binary number) corresponding to the "THgr" is output. R=0-7 in FIG. 31 shows a decimal notation of the phase-rotation-angle signal AR(3). For example, a received-signal-phase rotation angle obtained by judging a signal point of the point Z=[AVI(8), AVQ(8)] shown in FIG. 30 in accordance with a received-signal-phase-rotation-angle judging table is equal to "THgr"=0. Therefore, R becomes equal to 0 and (000) is transmitted as the received-signal-phase-rotation-angle signal AR(3). When the received-signal-phase rotation angle "THgr" is equal to xcfx80/4, R=1 is obtained and (001) is transmitted as the received-signal-phase-rotation-angle signal AR(3).
Because the remapper 7 comprising a ROM receives the received-signal-phase-rotation-angle signal AR(3) to rotate the phase of I and Q base-band signals I(8) and Q(8) in accordance with the received-signal-phase-rotation-angle signal AR(3), an absolute phase is generated.
Functions of the remapper 7 are described below. The remapper 7 constitutes a phase converting circuit for making the signal point arrangement of received I and Q base-band signals I(8) and Q(8) same as that of the transmission side. A received-signal-phase rotation angle "THgr" is calculated by the received-signal-phase-rotation-angle detecting circuit 8 and a received-signal-phase-rotation-angle signal AR(3) corresponding to the received-signal-phase rotation angle "THgr" is supplied to the remapper 7. In this case, the decimal notation R of the received-signal-phase-rotation-angle signal AR(3) is one of integers 0 to 7 and the relation with the received-signal-phase rotation angle "THgr" is defined as shown by the following expression (1).
R="THgr"/(xcfx80/4)xe2x80x83xe2x80x83(1)
In the above expression, "THgr" is equal to mxc2x7(xcfx80/4) and m is one of integers 0 to 7.
Absolute phase generation for I and Q base-band signals is realized by applying inverse rotation, that is, phase rotation of xe2x88x92"THgr" to a received-signal-phase rotation angle "THgr". Therefore, the remapper 7 phase-rotates input I and Q base-band signals I and Q by an angle xcex7 (=xe2x88x92"THgr") in accordance with the following expressions (2) and (3) and outputs absolute-phase-generated I and Q base-band signals Ixe2x80x2(8) and Qxe2x80x2(8) (hereafter referred to as Ixe2x80x2 and Qxe2x80x2 by omitting the number of quantization bits).
Ixe2x80x2=I cos(xcex7)xe2x88x92Q sin(xcex7)xe2x80x83xe2x80x83(2)
Qxe2x80x2=I sin(xcex7)xe2x88x92Q cos(xcex7)xe2x80x83xe2x80x83(3)
Moreover, it is permitted that a frame-synchronizing signal is acquired by the frame-sync detecting/regenerating circuit 2 and a frame-synchronizing pulse is output and thereafter, the transmission-configuration identifying circuit 9 previously identifies a transmission configuration and then the received-signal-phase-rotation-angle detecting circuit 8 detects a received-signal-phase rotation angle or the received-signal-phase-rotation-angle detecting circuit 8 previously detects the received-signal-phase rotation angle and then the transmission-configuration identifying circuit 9 identifies the transmission configuration. Moreover, it is possible to simultaneously perform the detection of a received-signal-phase rotation angle by the received-signal-phase-rotation-angle detecting circuit 8 and the identification of a transmission configuration by the transmission-configuration identifying circuit 9.
In case of the above-described conventional receiver, however, it is necessary to prepare such seven phase error tables as the phase error table 13 for correcting the phase of the reference carrier waves fc1 and fc2 for demodulation according to the 8PSK modulation system, phase error tables 14-1 and 14-2 for correcting the phase of the reference carrier waves fc1 and fc2 for demodulation according to the QPSK modulation system, and phase error tables 15-1 to 15-4 for correcting the phase of the reference carrier waves fc1 and fc2 for demodulation according to the BPSK modulation system. Therefore, there is a problem that a necessary memory capacity increases.
It is an object of the present invention to provide a receiver requiring only a small circuit size.
A receiver of the present invention comprises demodulating means for demodulating a signal to be PSK-modulated in which digital signals modulated by 2-phase, 4-phase, and 8-phase PSK modulation systems are time-multiplexed by using a carrier wave regenerated by carrier-wave regenerating means and outputting I and Q symbol-stream data in symbols; received-signal-phase-rotation-angle detecting means for detecting a phase rotation angle "THgr" of I and Q symbol-stream data against the transmission side for each symbol output from the demodulating means, inversely-phase-rotating means for rotating the phase of I and Q symbol-stream data for each symbol output from the demodulating means by xe2x88x92"THgr" against the phase rotation angle "THgr" detected by the received-signal-phase-rotation-angle detecting means, generating the absolute phase of the phase of the I and Q symbol-stream data, and outputting the absolute phase; and modulation-system identifying means for identifying a modulation system currently demodulated by the demodulating means; wherein the inversely-phase-rotating means rotates the phase of the I and Q symbol-stream data for each symbol output from the demodulating means by two types of phase rotation angles through time sharing and outputs the data and one of the two types is assumed to be equal to the above angle xe2x88x92"THgr" and the carrier-wave regenerating means is provided with a phase error table storing carrier-wave-phase-error data for various I and Q symbol-stream data sets after absolute phase generation by the 2-phase PSK modulation system and phase-error detecting means for detecting a phase error of a regenerated carrier wave by obtaining a shift angle "THgr"xe2x80x2 of a received-signal point shown by an I and Q symbol-stream-data set for each symbol after absolute phase generation viewed in the positive direction or negative direction of I-axis included in the phase error table up to a target phase convergent angle according to a modulation system identified by the modulation-system identifying means and reading carrier-wave-phase-error data corresponding to an I and Q symbol-stream data set when phase-rotating the other one of the two types to be phase-rotated by inversely-phase-rotating means by xe2x88x92("THgr"+"THgr"xe2x80x2) through time sharing out of a phase error table so as to correct a phase of a regenerated carrier wave in accordance with carrier-wave-phase-error data detected by the phase-error detecting means.
Inversely-phase-rotating means outputs I and Q symbol-stream data absolute-phase-generated by phase-rotating I and Q symbol-stream data for each symbol output from demodulating means by xe2x88x92"THgr" and moreover, outputs I and Q symbol-stream data phase-rotated by xe2x88x92("THgr"+"THgr"xe2x80x2) through time sharing when assuming a shift angle up to a target phase convergent point of a received-signal point shown by an absolute-phase-generated I and Q symbol-stream data set viewed in the positive or negative direction of I-axis included in a phase error table in accordance with a modulation system identified by modulation-system identifying means as "THgr"xe2x80x2. Phase-error detecting means reads phase error data out of a phase error table by using the I and Q symbol-stream data set. Because the phase error data is data corresponding to a modulation system of a received signal currently demodulated by demodulating means, a received-signal-phase rotation angle against the transmission side, and a received-signal point, carrier-wave regenerating means requires only one phase error table. Therefore, it is possible to decrease the number of phase error tables to be provided for carrier-wave regenerating means and greatly simplify a circuit configuration.